Assistant Professor, ECE, University of Illinois at Urbana-Champaign

Shobha Vasudevan

Research Interests

Shobha Vasudevan is an assistant professor at the Electrical and Computer Engineering department at the University of Illinois at Urbana-Champaign. Her research interests are in system verification and security, analog and digital hardware validation, formal, static analysis and statistical algorithms, machine learning and causal inferencing in big data and biomedical device modeling. Her research software for automatic assertion generation, GoldMine, is being licensed by several companies including IBM, AMD, Qualcomm, Huawei Technologies, TI, Oracle, and is being developed by a leading EDA company into a commercial product. She is a technical consultant for several companies. She is the recipient of the Best Paper Award in DAC 2014, NSF CAREER award, the ACM SIGDA outstanding new faculty award, the Dean's Award for Excellence in Research, Best paper award in VLSI Design 2014, IEEE Council of EDA Early Career Award, the YWCA award for mentoring women and several best paper nominations. She has conceptualized and leads MyTri, an initiative for connecting women engineers from UIUC through a professional networking portal.

Past Affiliations

Ph.D: Electrical and Computer Engineering, The University of Texas at Austin
M.S: Electrical and Computer Engineering, The University of Texas at Austin


Goldmine website live and kicking!

Goldmine Logo

GoldMine is now available for academic and research purposes for free download. Please use for intended and new applications and give us your feedback!

If you need GoldMine for a commercial purpose, please write to Prof. Shobha Vasudevan for an evaluation license.

Eye diagram analysis paper nominated for Best Paper

Our paper, Fast Eye Diagram Analysis for High Speed CMOS Circuits was nominated for best paper at DATE 2015. It was one of 6 about 240 accepted papers. Congratulations to my student Seyed Nematollah (Adel) Ahmadyan! The paper was written in collaboration with Intel and presents a powerful method to explore the analog/mixed signal design space. This proposes an alternative for Monte Carlo simulations. Has applications in embedded systems like automotives and biomedical devices that use a wide variety of analog and mixed signal chips.

Keynote speech at DATE workshop

Shobha Vasudevan gave a keynote address at the vibrant DUHDE workshop colocated with DATE 2015.

IEEE Design and Test editorial board

Shobha Vasudevan named as one of the editors of IEEE Design and Test. Please submit good papers to this magazine with wide readership in the design community.

IEEE CEDA Early Career Award

Shobha Vasudevan named as the 2014 recipient of the IEEE Council of EDA Early Career Award.


DAC2 Best Paper Award in DAC 2014

Our paper at DAC 2014 "Code Coverage of Assertions Using RTL Source Code Analysis" won the best paper award !The college, department and CSL ran an article on it. This was my first paper with a female graduate student, Sai Ma. Way to go Sai!!

Best paper award in VLSI Design 2014

Our paper "A Coverage Guided mining Approach for Automatic Generation of Succint Assertions" was awarded the best paper award at the VLSI Design conference 2014. Yet another GoldMine victory! The authors are Shobha Vasudevan, Lingyi Liu, David Sheridan and Hyung Sul Kim. An article appeared on the ECE website on it.

da8 Shobha Vasudevan named a recepient of 2014 Dean's award for excellence in research

Dean's award for excellence in research is awarded by the UIUC college of Engineering annually. Here is an article about the ECE professors who won the college awards this year.

Watch out for our paper at DAC 2014

"Code Coverage of Assertions Using RTL Source Code Analysis" by Viraj Athavale, Sai Ma, Sam Hertz and Shobha Vasudevan. This paper generates a code coverage metric for assertions using dynamic and static analysis techniques. Attend our presentation at DAC 2014!

System level assertion generation for performance and functionality

Automatic Generation of System Level Assertions from Transaction Level Models. Lingyi Liu and Shobha Vasudevan. Accepted. To appear in Journal of Electronic Testing: Theory and Applications (JETTA)

Our paper on invariant mining for debugging programs in ASE 2013

Parth Sagdeo et al's paper "Using Automatically Generated Invariants for Regression Testing and Bug Localization" introduces a novel bug localization methodology with PREAMBL, a predicate clustering and invariant guided tool. Invariants from PRECIS in ASE 2011 are used for software regression testing as well.

Watch our for our ICCAD 2013 paper on system level debug and diagnosis

Our paper "Diagnosing Root Causes of System Level Performance Violations" to be published in ICCAD 2013 uses a unique, data mining approach to pinpoint latency and throughput bottlenecks in system level designs. This problem was proposed by Huawei Technologies, and is a product of our collaboration with them.

Vasudevan's group has two papers in IEEE Transactions on CAD (TCAD) in May 2013

Our papers "Formal probabilistic timing verification in RTL" and "Mining Hardware Assertions With Guidance from Static Analysis" cover two diverse aspects of hardware verification. Read and enjoy!

Vasudevan wins ACM SIGDA Outstanding New Faculty Award


The award is given by ACM SIGDA to one junior faculty member who displays outstanding potential as an educator and/or researcher in the field of EDA. Many thanks to my students and collaborators for their role in this recognition. Pictures of the award ceremony can be found here.


Random foliage

Email: shobhav AT [my university]

Snail mail: 260, Coordinated Sciences Laboratory (CSL), 1308 West Main St. Urbana, IL 61801
Office: 217 333 8164